SBE HighWire HW400c/2 Spezifikationen PDF herunterladen (Seite 26)

26 Functional Information HW400p/M Technical Reference - 1.0, March 6, 2002

4-5. I/O Bus

The I/O Bus connects the following functional elements:

•DUART

• EEPROM

•Flash ROM

•CPLD

The I/O Bus has the following characteristics:

• It is an 8/16-bit data bus.

• It operates at 250-nsec cycle time buffered from the SDRAM bus.

• It is the Port X bus from the MPC8245.

DUART The DUART has two channels to support the console feature on channel B and

the download feature on channel A. Each channel has a separate interrupt

that is sent to the MPC8245 via the CPLD’s interrupt registers. See Section 4-

7, I/O Bus Control and Miscellaneous Logic, for register details.

Configuration, control, and data accesses are done through the DUART’s

microprocessor interface.

EEPROM A 2KB EEPROM organized as 2KB x 8-bit stores 1024 bytes of static factory

identification information, including the board’s serial number and MAC

addresses. When used with SBE’s VxWorks Boot Firmware, the remaining

1024 bytes store a boot parameter table. If the EEPROM is used for another

RTOS, do not overwrite the factory information in the address ranges given in

Table 4-3. Before it can be written, the EEPROM must be write-enabled by

setting the EEPWEN bit in the Board Status register (BSR) of the CPLD. See

Board Status Register (BSR) on page 45 for additional information.

Table 4-3 EEPROM address ranges

Start End Size Description

0xFFE10000 0xFFE103FF 1024 Reserved for factory use only. Do

not overwrite.

0xFFE10400 0xFFE107FF 1024 Available for use by RTOS or

applications code.

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